MMIC as is
A typical GaAs MMIC (used for power amplification) has less than 20% of GaAs area as Active Devices, where epitaxial layers are required.
The rest 50%+ area has epitaxial layers either etched away or neutralized (with ion bombardment) and used only as “insulation carrier” with interconnect and passive devices on top.
Efforts have been made to shrink down area occupied by passive devices, with difficulties – as GaAs can only afford low thermal budget.
An obvious waste in cost. Also pose unnecessary impact environmentally. (MOCVD epitaxial growth heavily pollutes)
Go Beyond MMIC – 3DMMIC
Process the Active Device (GaAs epiwafer) and Passive Device (Quartz, Sapphire, Glass…..) separately then hybrid bond WAFERS together.
Significantly reduce size and cost. (expensive GaAs epiwafer replaced with glass… etc)
Passive device density can be further enhanced as GaAs ohmic contact no more a limitation.
Freedom to choose foundry partners for wafer process……… with readily available bonding technologies.
Solution for Compact Layout
- Design methodology will NOT change much. More focus on product level EM simulations is expected though - as layout density increases following size shrinkage.
- Passive device wafer layout is simplified with our CommonPlatformTM layout scheme.
- Passive device equivalent circuit model needs to be investigated on the new insulating substrate.
- Active device model pretty much intact with parasitic revisited.
Key Characteristics
1. NOT chip-on-wafer, NOT chip-on-substrate, NOT multiple chip module MCM, NOT CoWoS.......
2. A clean value chain for adoption.
- Design house has same flow/ methodology only with 3D stack (No change for easy adoption!)
- Wafer foundry deliver same wafers with half die size (Glory to Foundry!!!)
3. Not a messy and mushy WHO DOES WHAT.
- GaAs foundry does active device wafers, glass supplier (e.g. LCD) does passive device wafers, OSAT combines wafers together, ………Exactly who gets the value? What is in there for each stakeholder?
Advantages of 3DMMIC
Size
- Saving space up to 80% of active device wafers (ADW - GaAs epitaxial wafers) is obvious.
- Advanced Si-like process can be used for passive device wafers (PDＷ -materials other than GaAs) which can easily match the size of ADW.
- Balance easy routing, power dissipation, Q-factor,……, 50% of size reduction is still a no-brainer.
- Quantum leap the current GaAs MMIC solution to its 3D future.
Cost
- Combining cheaper substrates with less photomask layers, 3DMMIC cuts down cost like a hot knife through butter.
- In the case of 50% size reduction design…………
- 30%+ cost reduction estimated…. And this is just the beginning….
It does save cost and footprint….. a lot
- Active area, decided by power density and circuit output, occupies a small portion of entire chip.
- “Cheaper materials” + “less photo mask layers”
Join us
Let’s turn 3DMMIC soiution into your advantage. Discover how our technology transforms your business.